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  CDMA Development Boards 
  
     
 
  ASTRA DEVELOPMENT BOARD 

 

Main features: 

  • Evaluation of the ASTRA's operation with various parameter settings with the CDMA Development Accelerator
  • Rapid prototyping of your full-duplex 3.3 Volt, 11.75 Mchips/s CDMA/Spread Spectrum application built around the ASTRA
  • Real-time emulation of your custom CDMA IC specification, as input for Sirius Communications CDMA/Spread Spectrum IC design service
  • Performance measurements such as real-time BER calculation
  • Real-time platform for customisation of data formatting, FEC, interleaving and tracking and acquisition control software on the on-board 3.3 Volt TMS320-LC31 DSP
  • Easy-to-use PC Command interface for control and monitoring of numerous parameters; PN codes (any family), PN length (any length uptill 1023), symbol rate, modulation scheme (any PSK-type scheme), digital IF, bandwidth and gain of feedback loops, transmit power, chip and carrier frequency steps, frame structure etc...
  • Observables dump function for visualisation of constellation plots
  • on-board A/D and D/A providing interface with RF front-end at low intermediate frequency
  • on-board RS-232 for serial link support
  • 128 kword SRAM (32 bits), 4 Mbit EEPROM on-board
  • Preprogrammed test messages
  • IS-95 features supported
  • stand-alone operation or interfacing with PC
  • Tutorial included
VITERBI DECODER MODULE available!
16 kbps supported (R=1/2 , K=7, depth = 32)
150 kbps DSP software module for ASTRA based designs!
 
Optional Software Package: Source code for development purposes: 
  • CDMA and PSK evaluation tests
  • Field tests
  • Performance tests such as real-time BER measurements
  • Determination of modem parameters for a particular application
  • Educational and R&D purposes: set-up of easy-to-use real-time CDMA lab infrastructure
 SC8002 GEMINI - FEC Development Board 
 
The GEMINI Development Board is a FEC and radio-interface extension board for the ASTRA Development Board.  
It also allows you to implement and test your own proprietary FEC algorithms in real-time. 

It can be equipped with Sirius forward error correction (FEC) algorithms. 

It allows to extend the SC2002 ASTRA Development Board with a large number of digital and analog interfaces, and other peripherals, such as a DALLAS 2404 real-time clock 

The GEMINI Development Board features 2 FPGAs, each supported by SRAM, flash EPROM and periphery. Both FPGAs are mapped into the memory map of the DSP on the SC2002 ASTRA Development Board. The functions of the GEMINI Board are controlled via the ASTRA Board user interface. This interface communicates to the host PC via the ASTRA Board UART 

Main features 

  • interface to the DSP on the ASTRA Development Board, including ANSI-C source code of the TMS320 host software library for accessing the GEMINI functions
  • Support for the two 4Mbit flash EPROMs (boot code, modem parameters, PN code sets,...)
  • SC4001 Development Kit interface
  • 4 PWM interfaces for radio control
  • 16-bit digital general purpose I/O port (each pin direction can be separately programmed)
  • Hitachi standard 4-line LCD display, 4 user-definable buttons and 6 user-definable signal LED's
  • I2C interface
  • DALLAS 2404 Real Time Clock/EconoRAM with watch Xtal
  • Board Space to mount your own reference Xtal
  • Complete cable set, manual with comprehensive tutorial guide
Optional features 
  • Reed-Solomon encoder and decoder
  • Convolutional encoder and decoder
  • Interleaver/deinterleaver
  • Support for the two 128 kb SRAMs
  • RS232 DTE Interface
  • RS232 DCE Interface
  • RS422/485 interface
Download SC8002 brochure 

SC9002 ASAP CDMA Development Board  
 
The ASAP Development Board provides a complete and flexible Physical layer for robust high-speed data communications. 

2 parallel DQPSK/CDMA channels of 2.5 Mchips/s each

 
600 kbps (tbc) for PN code length 16 and 12 dB processing gain 

Fully Programmable, runtime switcheable PN codes and code lengths up to 1023 providing 30 dB processing gain. 

Based on the SC2001 ASTRA IC for spreading , TX band limiting filtering, upconversion, downconversion, RX baseband filtering and correlation. Flexibility is offered through the parameterization of the SC2001 ASTRA. 

It also contains a XC4036XL FPGA, loaded with the ASAP SC9001 CDMA Acquisition, tracking and demodulation algorithms. It also allows you to implement and test your own proprietary CDMA demodulation algorithms in real-time. 

All analog and digital interfacing to an RF frontend and a host processor is included on the board. Synchronous CDMA basestation development is fully supported. RRC pulse shaping with 25 dB out-band suppression. CDMA/FDMA channelization is supported. Analog interfacing is at a programmable intermediate frequency between 0-10 MHz 

Features: 

  • SC2001 ASTRA CDMA frontend
  • SC9001 ASAP Demodulation
  • 32 bit host processor interface, including ANSI-C source code for access routines for ARM host processor
  • RS232 DCE or DTE host interface (optional)
  • I2C port (optional)
  • CAN port (optional-under development)
  • 50-pin Logic State Analyser (LSA) interface for debugging the demodulator
  • 4 Mbit flash EPROM storing ASAP configurations, modem parameters and PN Code sets
  • Flash EPROMservice module
  • 8-bit 30MSamples/s DAC for the transmitter
  • 8-bit 20 MSamples/s ADC for the receiver
  • 100 kSamples/s RSSI ADC
  • 2 PWM outputs to control the radio front end
  • 9 general purpose I/O pins
Applications 
  • upstream cable modems
  • point to point communications
  • powerline communication
Download SC9002 brochure 

DataSat CDMA Development System 

The DataSat CDMA Development System from Sirius Communications provides the physical layer equipment for satellite ground stations exploiting n * 64 kbit/s bidirectional data traffic. Spread spectrum/CDMA modulation provides efficient interference rejection, low power spectral density and inherent additional security.  

Applications include low cost VSAT data communications and transport of Internet data over existing geostationary transponders. The DataSat Development System is directly compatible with Sirius Communications' ASTRA Development Board and Development Accelerator for satellite terminal prototyping. 

More information can be found on the satellite communications page 

DIRAC Development Board 

The DIRAC Development Board features the DIRAC CDMA/Spread Spectrum receiver chip (containing an ARM processor and a UART), RAM/ROM for the ARM, and an ADC. This allows full flexibility in demodulation schemes, data rates, despreading technique, tracking loops, synchronization algorithms, acquisition strategy, etc. 

The DIRAC Development Board provides a serial host interface, that you can connect to any RS-232 terminal or PC. This allows you to set parameters, check parameter settings, download software on the ARM processor, download codes into the despreader of the DIRAC chip, measure Bit Error Rates and other performance measures via a terminal or PC. 

More information can be found on the DIRAC page 

Extension Board 

The SC2003 Extension Board is an auxiliary board that combines a number of functions. It allows to connect two or more SC2002 ASTRA Development Boards to: 

  • provide firm common ground and power levels for all boards connected to it
  • serially boot a slave board from a master board. The use of the SC2003 Extension Board for serial booting only is not mandatory, but elegant and robust.
  • connect the master board to the Modem Development KIT, which is a PC with graphical User interface, for more elaborate modem performance evaluations
  • to connect one master and several slave SC2002 ASTRA Development Boards in a Synchronous CDMA (S-CDMA) mode for base station Development and network software Development
  • to connect several SC2002 Development Boards for buffered serial communication over the SP0 ports for parallel processing
  • to insert SC2002 ASTRA Development Boards into a rack cabinet to prototype your own base stations
  • The SC2003 Extension Board is a standard feature of the Kit (DOS version)
CDMA POWERLINE DEVELOPMENT Kit Interface 
 
Spread Spectrum Technology is very reliable in hostile environments such as the AC- Power Line. 

This is an overlooked communication medium because of its bad channel characteristics. 

Sirius Communications has now a Powerline Interface in its product range, compatible with the ASTRA Spread Spectrum Development Board.

  cdma ics
The problems of impulse noise (e.g.: lightning, switching noise, electric motors, silicon-controlled rectifiers,...) and the attenuation on the powerline (varying widely according to the loading at a given time) have been solved by applying the correct filters and opamps (with the possibility of AGC). The data rate that can be obtained depends on the PN-code length and the bandwidth regulations. It only takes a few minutes to hook this interface board up and start your Spread Spectrum Powerline experiments!
 
    CDMA DEVELOPMENT ACCELERATOR 

The effect of typical parameters of the ASTRA Development Board can immediately be quantified using the CDMA Development Accelerator. 

 

The SC13002 CDMA Development Accelerator is our NEW Windows-based CDMA Modem Development Kit and is available with a 32-bit parameter setup and command interface, and a graphical interface for realtime vizualization of receiver signals and constellation plots. Fast downloading of DSP execution code is also supported. 

  • Saving correlation data for post processing
  • more than 60 parameters can be changed; IF rate, Pn codes, DLL gain, DLL-BW, PLL-Gain, PLL-BW, FFT, Rx and Tx Filter, Viterbi,...
  • Output to correlation plot, constellation plot, and acquisition plot
  • possible to plot 20 different signals:Gain, Rx Carrier, Chip phase, i Early, Iq Early, Ii middle, Iq Middle, Qi middle,...
  • includes Doppler simulation
  • fast downloading of ASTRA software
  • loading of your own preferred PN codes
  • terminal for textual interface
  • separate data and control interface
FREE HANDS-ON TRAINING INCLUDED WITH THE PURCHASE OF THE CDMA DEVELOPMENT ACCELERATOR 
 
  Plots available    Screens available   
 

CDMA Modem Development Kit  

(See also the Windows-based CDMA Development Accelerator). The DOS-based CDMA Development Kit allows to continuously monitor in real-time up to 6 simultaneous receiver signals, such as correlation values, the receiver phase error, the AGC value, the carrier recovery and the timing recovery. A complex constellation diagram can also be shown. These measurements allow to quickly evaluate the performance of a receiver, and to tune the transmitter and/or receiver parameters. The ASTRA Development Board allows to program a huge range of modem parameters, and to derive Bit Error Rate (BER) figures. The effect of typical parameters of the Development Board can immediately be quantified using the ASTRA Development Kit. For instance, the step response of the PLL for carrier recovery can be visualised as a function of the PLL gain and PLL bandwidth.  

The ASTRA Development Kit consists of the following parts: 

1. Development Kit Monitor software 

 

At the right of the screen, the constellation plot of the demodulated QPN signal is shown. 

The Development Kit Monitor software can simultaneously handle 6 measurements out of a set of 32 receiver signals. This set can be freely assigned by the user, and the configuration can be done from the Development Board terminal window. Any of the 6 measurement channels can be plotted on a time axis, or in a complex plane, or both at the same time. The following 2 examples the system under test uses QPSK with different codes of length 15 on the I and the Q branches. This is also called QPN (Quadriphase Pseudo-Noise).  

At the left of the screen, the 2 upper function plots show snapshots of the correlation data of I and Q channels with each code, as a function of time. The third functional plot shows the chip frequency offset at the receiver (D_RX_FCHIP) and the frequency offset (D_RX_CARR) of the receiver carrier, as a function of time.  

Lock-in behavior of carrier tracking PLL 

As a result of a carrier frequency step at the transmitter side, the receiver carrier frequency starts to produce a beatnote, that slows down in frequency until lock is reached. During pull-in, correlation values are unusable, and become stable again when lock is reached. The receiver chip frequency offset (D_RX_CARR) remains unaffected. The transient behavior results in constellation dots outside the main spots. 

 

Receiver response to step in transmit chip frequency. 

As a result of a chip frequency step at the transmitter side, the receiver chip frequency (D_RX_FCHIP) offset starts evolving towards a new stable value. The receiver carrier tracking loop (see D_RX_CARR) goes through a transient behavior, due to the coupling with the chip frequency tracking loop, and then reaches again its original value.  

2. ASTRA software extension 

The ASTRA software running on the TMS LC31PQL is extended with a separate monitor process, that runs on the frequency of one of the internal timers of the TMS. This monitor process selects 6 out of 32 measurements and sends them to the PC via the ISA board.This set of 32 monitor signals is updated by the ASTRA receiver process every symbol. 

To match the slower speed of the PC, the selected measurements are automatically downsampled by the monitor process. However, independent of the speed of the PC running the Development Kit Software, the measurement set is always kept consistent. The faster the PC, the higher the resolution of the measurements plotted on the screen of the PC. 

The TMS monitor process is provided as source code, and is open to the developer, who can add his own signals to observe via the Development Kit, up to a maximum of 32 signals.  

3. ISA interface board 

The ASTRA Development Board communicates to the PC via an ISA interface board. 

ASTRA Compatible Baseband to 70 MHz IF converter 
 
 

The unit will up and down convert the Baseband signal from the ASTRA Development board to and from an industry standard 70 MHz IF. Up and downconverter will operate at the same time. 

The unit is housed in a metal sheet box to assure proper RF shielding and is equipped with SMA connectors (SMC connectors are available upon request) and feed-through capacitors for the power supplies (+5 and +12 Volt). 

The local oscillator (standard frequency of 67 MHz) is a +/- 1 ppm (over a 0 to +50° C temperature range) TCXO. Better frequency stability (+/- 0.5 ppm) and higher operating temperature ranges (-20 to +70° C) are available upon request.

  The upconverter will convert a 3 MHz IF signal from the ASTRA Development Board to the IF frequency. The IF output signal at 70 MHz is filtered with a 2.5 MHz wide (at -3 dB) Surface Acoustic Wave Filter. 

The downconverter will convert a 70 MHz IF signal to a 3 MHz IF signal. The input IF is filtered by the same type of SAW and downconverted with an LO coming from the same TCXO. The baseband is filtered with a 5 MHz low pass filter. Other SAW passbands (0.5 MHz steps) are available upon request. 

cdma ics 
 
 

  
ASTRA compatible 2.4 GHz radio Front-end  

The S-Band radio consists of triple conversion up and down converters. Both converters operate from the same local oscillator. The unit is intended as an on-the-air evaluation add-on unit for the SIRIUS Communications ASTRA Development board. 

The radio is contained in a metal sheet housing to assure proper RF shielding and is equipped with SMA connectors (SMC connectors are available upon request) and feed-through capacitors for the power supply and control lines. The radio is built with standard, readily available MMIC components. As such, the unit is optimized for performance and flexibility rather than for low power consumption, cost and size. 

The receiver is equipped with a 2.2 dB noise figure LNA (output IP3 of 18.5 dBm). The part is set for best noise figure. If a higher IP3 is required -max 26.5 dBm- this can be set. In that case the NF will increase to 2.6 dB. The receiver has an 80 dB AGC amplifier that can either be controlled externally or internally through the RSSI signal. 

The transmitter delivers an output power of 10 mW and the unit can be easily modified to deliver more output power (max 40 mW). The output power level can be controlled from the ASTRA development board. HPA’s that deliver 10 Watt and more are available upon request. 

The oscillator is based upon a TCXO and multiplier chains. This guarantees stable and clean LO signals. The standard transmit and receive frequencies are set at 2.442 GHz. Baseband filtering is done with a standard low pass filter and can be set at cut-off frequencies of either 5 or 8 MHz depending on the IF frequency. 

Receiver and transmitter antenna connections can be either separate or routed through an on-board (solid state) antenna switch. The two antennas delivered with the radio are single patch microstrip antennas, linearly polarized with 5 dB of gain. Circularly polarized patches and high gain antennas are available upon request. 

The IF in and output connections match the specifications of the ASTRA Development Board. 

Besides IF connections and power supply (5 Volt) the radio has the following control signal connections: individual power control for LO, RX and TX, Transmit/Receive, AGC in and RSSI out. 
 
 
 
 

           
 
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