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XE1201
Single Chip RF Transceiver |
XE1201 Evaluation Kit
Test and measure the XE1201 performances at your site with the flexible, easy-to-use
evaluation kit. PC interface software included.
Download the User's Guide & Software
Package (.zip)(2.33MB)
XEMICS SA
Stefania Cocco
Tel: +41 32 720 55 77
Fax: +41 720 57 70
e mail: stefania.cocco@xemics.ch
The XE1201 is a single-chip UHF transceiver designed for
low-power and low-voltage wireless link applications. With only a few external components,
a low cost and physically small half-duplex data transceiver can easily be designed. The
transceiver includes a bit synchroniser so that synchronised received data can directly be
read by a microcontroller.
Key Product Features
- Low voltage operation, down to 2.4V
- Very low current consumption: 6 mA in reception, 8 mA in
transmission
- High sensitivity (-112 dBm)
- Few external components (low cost)
- Programmable data rate between 4k bit/s and 64k bit/s, Half-duplex
operation
- On-chip bit synchroniser
- Output power programmable via bus
- 300-500 MHz frequency range
- FSK modulation
- Fourth order on-chip channel filtering
- On-chip image frequency cancellation
- Optional temperature compensation of the SAW frequency through digital
calibration
- Three-wire bus for easy microcontroller interface
XE1201 Applications
- Remote data collection for energy metering
- Wireless sensing
- Point of sales, home appliances
- Telemetry
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- Building control, security system
- Wireless audio and data link
- Remote control
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Description
Receiver |
The FSK modulated signal coming from antenna matching network is
amplified by a differential low-noise amplifier before direct (zero IF) down-conversion to
baseband. For better performance, this amplifier uses an external LC tank
circuit. The conversion to baseband is realised with two double balanced mixers that
generate the I and Q signals. This down converting scheme realizes an electronic frequency
image cancellation so that no external image filter is needed, reducing the cost and the
size of the application. An offset cancellation block avoids the self-reception problem.
The baseband I and Q signal are filtered (4th order integrated filters) and amplified
before demodulation. The demodulator includes a bit synchroniser that generates a
synchronised clock so that data can directly be read by a microcontroller without any
extra interface or signal processing. A low cost quartz oscillator provides the
demodulator and the bit synchroniser clock. |
Transmitter |
The modulator is realised with a DDS (Direct Digital Synthesiser) that
generates the FSK signal. This baseband signal is up-converted by two double balanced
mixers. The UHF modulated signal is then amplified by a programmable gain power amplifier
and passed on to antenna matching network. |
Local oscillator (LO) generation |
The local oscillator uses an external SAW resonator and a LC
tank circuit. The temperature drift of the SAW resonator can be compensated by adding a
frequency offset before up-conversion. This frequency offset value can be programmed via
the 3-wire bus. This allows the use of a low cost SAW resonator. |
Chip control block |
This block controls the chip mode. The data rate, modulation index, RF
output power and frequency drift compensation can be changed via the 3-wire bus so that a
very flexible application can be designed. |
Quick reference data
supply voltage 2.4 V
RF sensitivity -105 dBm
data rate 64 kbits/s
transmitted power -5 dBm
Absolute ratings
supply voltage 2.4 V - 6 V
storage temperature -55°C to 150°C
operating temperature -40°C to 85°C
Download
Copyright ©1998-99 XEMICS All Rights Reserved.
Last Updated: January 31st, 2000 |
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