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Information as of 2000-01-10
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74AVC16836; 20-bit registered driver with inverted register enable (3-state)
Description
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Datasheet
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DescriptionGo to the top of this page

The 74AVC16836 is a 20-bit universal bus driver. Data flow is controlled by output enable (OE), latch enable (LE) and clock inputs (CP).

This product is designed to have an extremely fast propagation delay and a minimum amount of power consumption.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor (Live Insertion).

A Dynamic Controlled Output (DCO) circuitry is implemented to support termination line drive during transient. See the graphs on page 8 for typical curves.


FeaturesGo to the top of this page

  • Wide supply voltage range of 1.2 V to 3.6 V
  • Complies with JEDEC standard no. 8-1A/5/7.
  • CMOS low power consumption
  • Input/output tolerant up to 3.6 V
  • DCO (Dynamic Controlled Output) circuit dynamically changes output impedance, resulting in noise reduction without speed degradation
  • Low inductance multiple VCC and GND pins for minimum noise and ground bounce
  • Power off disables 74AVC16836 outputs, permitting Live Insertion


DatasheetGo to the top of this page

Type nr.

Title

Publication release date

Datasheet status

Page count

File size (kB)

Datasheet

74AVC16836  20-bit registered driver with inverted register enable (3-state)  23-Jul-99  Preliminary Specification  10   166  Download PDF Open 


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